This part of the programmer is the interface between the PIC that is doing all the programming and the target PIC. Since it is a production programmer, during verify, the voltages for legal high and low levels will vary along with the variable Vdd. A legal logic 0 is .2Vdd, and a legal logic 1 is .8Vdd. Since Microchip saw to it to make the data pin both in and out, we have to take that into consideration also.

To talk to the target, the data is sent as you would expect, down the prog_data_out line, clocked in by the prog_data_clock. After a read command is issued, the data out line must stop driving the target and this circuit must start listening. The prog_data_out is driven high, but its not a really hard driven high, so it can be brought down by the target. The data out the prog_data_in is actually inverted, and that is taken care of in the firmware.

The big question is: why the two inverters? I had this silly notion when I started this, that I wanted a 1 driven by the PIC to be a 1 out, so I would not get confused. I wired it up, and it worked. I originally wanted the reading part to have straight through logic too. I went back on this idea as shown by the reading circuit (the 2N2222), since it inverts. I just swapped the bsf and bcf in the firmware, and now it works fine. This may be corrected in the future, but not before V2.0.